#ifndef VIS_ETH_H
#define VIS_ETH_H

#include <linux/version.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/msi.h>
#include <linux/proc_fs.h>
#include <linux/kthread.h>
#include <linux/ethtool.h>
#include <linux/timer.h>
#include <linux/workqueue.h>
#include <linux/skbuff.h>
#include <linux/crc32.h>

#include "vis_eth_qdma.h"
#include "vis_eth_sr.h"
#include "vis_iic.h"
#include "vis_rdma.h"


#define DEVICE_NAME         "visroce1"
#define DRV_MODULE_NAME     "vis_en"
#define DRV_MODULE_VERSION  "0.1"

//#define VISDEBUG
#ifdef VISDEBUG
#define vis_log_err(fmt, ...)   do{ pr_info("%s:%04d " fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__);} while(0)
#define vis_log_info(fmt, ...)  do{ pr_info("%s:%04d " fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__);} while(0)
#define vis_log_debug(fmt, ...) do{ pr_info("%s:%04d " fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__);} while(0)
#else
#define vis_log_err(fmt, ...)   do{ pr_info("%s:%04d " fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__);} while(0)
#define visroce_log_info(fmt, ...)  do{ pr_info("%s:%04d " fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__);} while(0)
#define visroce_log_debug(fmt, ...) do{ } while(0)
#endif



#define vis_write_reg(value, offset) do { iowrite32(value, offset); } while(0)
#define vis_read_reg(offset) ioread32(offset)

struct vis_bars {
    void *__iomem qdma_bar_mmio_addr;
    void *__iomem axil_bar_mmio_addr;
    resource_size_t qdma_bar_start, qdma_bar_end, qdma_bar_len;
    resource_size_t axil_bar_start, axil_bar_end, axil_bar_len;
    unsigned long qdma_bar_flags, axil_bar_flags;
};



struct vis_dev {
    struct pci_dev    *pdev;
    struct net_device *ndev;
    struct net_device_stats stats;
    char mac_addr[ETH_ZLEN];
    char name[16];

    struct vis_bars *bars;



    //QDMA
    u32 devfn;
    u16 qid_base, q_num;
    u16 h2c_ring_size, c2h_ring_size;

    struct msix_entry *msix;




    //SACK
    u8 enable_selective_retrans;
    u32 sr_timeout_timer;
    u32 fast_retrans_timer;
};




#endif
